The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and designs have produced generations of ICs where each new generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional densities (i.e., the number of interconnected devices per chip area) have generally increased while geometry sizes (i.e., the smallest component or line that can be created using a fabrication process) have decreased. Such scaling-down process generally provides benefits by increasing production efficiency and lowering associated costs.
In the scaling trend, various materials have been used for the gate electrode and gate dielectric in forming the field effect transistors (FET). One approach is to fabricate these devices with a metal material for the gate electrode and a high-dielectric-constant (high-k) dielectric for the gate dielectric. However, high-k metal gate (HKMG) devices often require additional layers in the gate structure. For example, work function layers may be used to tune the work function values of the metal gates. The HKMG devices may suffer from device performance issues due to the shrinking dimensions and processing methods.